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Parallel Computing Technologies Third International Conference (PaCT-95) September 12-15, 1995. St.-Petersburg, Russia Proceedings Home PaCTs Prev Contents Next Authors
	Vol. 964

Compilation of CDL for Different Target Architectures

by C. Hochberger, R. Hoffmann, S. Waldschmidt

Abstract:
Cellular Processing is an attractive and simple massive parallel processing model. To increase its general acceptance and usability it must be supported by a software environment, an efficient simulator and a special language. For this purpose the cellular description language CDL was defined and implemented. With CDL complex cellular algorithms can be described in a concise and readable form. Compilers were developed which generate C-code for the software simulator or a logical design for the CEPRA-8L simulator, which uses field programmable gatearrays to compute the state transition of the cells. An example is presented to show the process of compilation for different target architectures.

Keywords: Software



Classification:
	C.1	processor architectures
	C.2	computer-communication networks
	C.3	special-purpose and application-based systems; microprocessor/microcomputer applications; process control systems; real-time systems; signal processing systems
	C.4	performance of systems; design studies; measurement techniques; modeling techniques; performance attributes; reliability, availability, and serviceability
	D.1	programming techniques
	D.2	software engineering
	D.3	programming languages
	D.4	operating systems
	F.1	computation by abstract devices
	F.2	analysis of algorithms and problem complexity


Source:
C. Hochberger, R. Hoffmann, S. Waldschmidt, Compilation of CDL for Different Target Architectures.
In V. Malyshkin (ed.), Parallel Computing Technologies: Proceedings of the 3th International Conference, Lect. Notes in Comp. Sci., Vol. 964, Springer, 1995, pp. 169-179

ISSN 0302-9743
ISBN 3-540-60222-4

Search LNCS articles for:
Hochberger, C. ; Hoffmann, R. ; Waldschmidt, S.



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